4 Commits (938716c753cbdb4501d1b406cd212983999bc0c3)

Author	SHA1	Message	Date
Ross Wightman	12d9a6d4d2	First timm.bits commit, add initial abstractions, WIP updates to train, val... some of it working	4 years ago
Ross Wightman	27b3680d49	Revamp LR noise, move logic to scheduler base. Fixup PlateauLRScheduler and add it as an option.	5 years ago
Ross Wightman	c6b32cbe73	A number of tweaks to arguments, epoch handling, config ... * reorganize train args * allow resolve_data_config to be used with dict args, not just arparse * stop incrementing epoch before save, more consistent naming vs csv, etc * update resume and start epoch handling to match above * stop auto-incrementing epoch in scheduler	5 years ago
Ross Wightman	aa4354f466	Big re-org, working towards making pip/module as 'timm'	5 years ago