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547 lines
20 KiB
547 lines
20 KiB
#include <stdint.h>
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#include <stdio.h>
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#include <assert.h>
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#include <stdlib.h>
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#include <time.h>
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#include <math.h>
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#include <sys/time.h>
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#include <immintrin.h>
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const int N = 1 << 14;
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const int M = 768;
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//
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// naive implementation
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//
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void mul_mat_vec_f32_0(
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const float * restrict src0,
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const float * restrict src1,
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float * dst,
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int nrows,
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int ncols) {
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for (int i = 0; i < nrows; i++) {
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float sum = 0.0f;
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for (int j = 0; j < ncols; j++) {
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sum += src0[i*ncols + j]*src1[j];
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}
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dst[i] = sum;
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}
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}
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//
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// SIMD with 8 32-bit floats
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//
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float reduce_vector8_0(__m256 v) {
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__m128 v1 = _mm256_extractf128_ps(v, 0);
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__m128 v2 = _mm256_extractf128_ps(v, 1);
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__m128 v3 = _mm_add_ps(v1, v2);
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__m128 v4 = _mm_shuffle_ps(v3, v3, 0x4e);
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__m128 v5 = _mm_add_ps(v3, v4);
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__m128 v6 = _mm_shuffle_ps(v5, v5, 0x11);
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__m128 v7 = _mm_add_ps(v5, v6);
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return _mm_cvtss_f32(v7);
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}
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// vectorized implementation using AVX
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void mul_mat_vec_f32_1(
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const float * restrict src0,
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const float * restrict src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols8 = ncols & ~7;
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for (int i = 0; i < nrows; i++) {
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__m256 sum = _mm256_setzero_ps();
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for (int j = 0; j < ncols8; j += 8) {
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__m256 a = _mm256_loadu_ps(src0 + i*ncols + j);
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__m256 b = _mm256_loadu_ps(src1 + j);
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__m256 c = _mm256_mul_ps(a, b);
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sum = _mm256_add_ps(sum, c);
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}
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dst[i] = reduce_vector8_0(sum);
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for (int j = ncols8; j < ncols; j++) {
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dst[i] += src0[i*ncols + j]*src1[j];
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}
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}
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}
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void mul_mat_vec_f32_2(
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const float * restrict src0,
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const float * restrict src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols32 = ncols & ~31;
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for (int i = 0; i < nrows; i++) {
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__m256 sum0 = _mm256_setzero_ps();
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__m256 sum1 = _mm256_setzero_ps();
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__m256 sum2 = _mm256_setzero_ps();
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__m256 sum3 = _mm256_setzero_ps();
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const float * restrict src0_row = src0 + i*ncols;
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for (int j = 0; j < ncols32; j += 32) {
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__m256 a0 = _mm256_loadu_ps(src0_row + j + 0);
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__m256 a1 = _mm256_loadu_ps(src0_row + j + 8);
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__m256 a2 = _mm256_loadu_ps(src0_row + j + 16);
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__m256 a3 = _mm256_loadu_ps(src0_row + j + 24);
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__m256 b0 = _mm256_loadu_ps(src1 + j + 0);
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__m256 b1 = _mm256_loadu_ps(src1 + j + 8);
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__m256 b2 = _mm256_loadu_ps(src1 + j + 16);
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__m256 b3 = _mm256_loadu_ps(src1 + j + 24);
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sum0 = _mm256_fmadd_ps(a0, b0, sum0);
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sum1 = _mm256_fmadd_ps(a1, b1, sum1);
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sum2 = _mm256_fmadd_ps(a2, b2, sum2);
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sum3 = _mm256_fmadd_ps(a3, b3, sum3);
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}
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dst[i] = reduce_vector8_0(_mm256_add_ps(_mm256_add_ps(sum0, sum1), _mm256_add_ps(sum2, sum3)));
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for (int j = ncols32; j < ncols; j++) {
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dst[i] += src0[i*ncols + j]*src1[j];
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}
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}
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}
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//
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// SIMD with 8 16-bit floats
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//
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static inline float fp32_from_bits(uint32_t w) {
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#if defined(__OPENCL_VERSION__)
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return as_float(w);
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#elif defined(__CUDA_ARCH__)
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return __uint_as_float((unsigned int) w);
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#elif defined(__INTEL_COMPILER)
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return _castu32_f32(w);
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#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
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return _CopyFloatFromInt32((__int32) w);
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#else
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union {
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uint32_t as_bits;
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float as_value;
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} fp32 = { w };
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return fp32.as_value;
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#endif
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}
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static inline uint32_t fp32_to_bits(float f) {
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#if defined(__OPENCL_VERSION__)
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return as_uint(f);
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#elif defined(__CUDA_ARCH__)
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return (uint32_t) __float_as_uint(f);
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#elif defined(__INTEL_COMPILER)
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return _castf32_u32(f);
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#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))
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return (uint32_t) _CopyInt32FromFloat(f);
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#else
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union {
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float as_value;
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uint32_t as_bits;
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} fp32 = { f };
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return fp32.as_bits;
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#endif
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}
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/*
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* Convert a 16-bit floating-point number in IEEE half-precision format, in bit representation, to
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* a 32-bit floating-point number in IEEE single-precision format.
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*
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* @note The implementation relies on IEEE-like (no assumption about rounding mode and no operations on denormals)
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* floating-point operations and bitcasts between integer and floating-point variables.
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*/
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static inline float fp16_ieee_to_fp32_value(uint16_t h) {
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/*
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* Extend the half-precision floating-point number to 32 bits and shift to the upper part of the 32-bit word:
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* +---+-----+------------+-------------------+
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* | S |EEEEE|MM MMMM MMMM|0000 0000 0000 0000|
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* +---+-----+------------+-------------------+
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* Bits 31 26-30 16-25 0-15
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*
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* S - sign bit, E - bits of the biased exponent, M - bits of the mantissa, 0 - zero bits.
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*/
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const uint32_t w = (uint32_t) h << 16;
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/*
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* Extract the sign of the input number into the high bit of the 32-bit word:
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*
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* +---+----------------------------------+
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* | S |0000000 00000000 00000000 00000000|
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* +---+----------------------------------+
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* Bits 31 0-31
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*/
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const uint32_t sign = w & UINT32_C(0x80000000);
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/*
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* Extract mantissa and biased exponent of the input number into the high bits of the 32-bit word:
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*
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* +-----+------------+---------------------+
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* |EEEEE|MM MMMM MMMM|0 0000 0000 0000 0000|
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* +-----+------------+---------------------+
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* Bits 27-31 17-26 0-16
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*/
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const uint32_t two_w = w + w;
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/*
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* Shift mantissa and exponent into bits 23-28 and bits 13-22 so they become mantissa and exponent
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* of a single-precision floating-point number:
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*
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* S|Exponent | Mantissa
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* +-+---+-----+------------+----------------+
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* |0|000|EEEEE|MM MMMM MMMM|0 0000 0000 0000|
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* +-+---+-----+------------+----------------+
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* Bits | 23-31 | 0-22
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*
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* Next, there are some adjustments to the exponent:
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* - The exponent needs to be corrected by the difference in exponent bias between single-precision and half-precision
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* formats (0x7F - 0xF = 0x70)
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* - Inf and NaN values in the inputs should become Inf and NaN values after conversion to the single-precision number.
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* Therefore, if the biased exponent of the half-precision input was 0x1F (max possible value), the biased exponent
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* of the single-precision output must be 0xFF (max possible value). We do this correction in two steps:
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* - First, we adjust the exponent by (0xFF - 0x1F) = 0xE0 (see exp_offset below) rather than by 0x70 suggested
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* by the difference in the exponent bias (see above).
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* - Then we multiply the single-precision result of exponent adjustment by 2**(-112) to reverse the effect of
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* exponent adjustment by 0xE0 less the necessary exponent adjustment by 0x70 due to difference in exponent bias.
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* The floating-point multiplication hardware would ensure than Inf and NaN would retain their value on at least
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* partially IEEE754-compliant implementations.
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*
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* Note that the above operations do not handle denormal inputs (where biased exponent == 0). However, they also do not
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* operate on denormal inputs, and do not produce denormal results.
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*/
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const uint32_t exp_offset = UINT32_C(0xE0) << 23;
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#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) || defined(__GNUC__) && !defined(__STRICT_ANSI__)
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const float exp_scale = 0x1.0p-112f;
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#else
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const float exp_scale = fp32_from_bits(UINT32_C(0x7800000));
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#endif
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const float normalized_value = fp32_from_bits((two_w >> 4) + exp_offset) * exp_scale;
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/*
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* Convert denormalized half-precision inputs into single-precision results (always normalized).
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* Zero inputs are also handled here.
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*
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* In a denormalized number the biased exponent is zero, and mantissa has on-zero bits.
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* First, we shift mantissa into bits 0-9 of the 32-bit word.
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*
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* zeros | mantissa
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* +---------------------------+------------+
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* |0000 0000 0000 0000 0000 00|MM MMMM MMMM|
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* +---------------------------+------------+
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* Bits 10-31 0-9
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*
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* Now, remember that denormalized half-precision numbers are represented as:
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* FP16 = mantissa * 2**(-24).
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* The trick is to construct a normalized single-precision number with the same mantissa and thehalf-precision input
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* and with an exponent which would scale the corresponding mantissa bits to 2**(-24).
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* A normalized single-precision floating-point number is represented as:
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* FP32 = (1 + mantissa * 2**(-23)) * 2**(exponent - 127)
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* Therefore, when the biased exponent is 126, a unit change in the mantissa of the input denormalized half-precision
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* number causes a change of the constructud single-precision number by 2**(-24), i.e. the same ammount.
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*
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* The last step is to adjust the bias of the constructed single-precision number. When the input half-precision number
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* is zero, the constructed single-precision number has the value of
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* FP32 = 1 * 2**(126 - 127) = 2**(-1) = 0.5
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* Therefore, we need to subtract 0.5 from the constructed single-precision number to get the numerical equivalent of
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* the input half-precision number.
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*/
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const uint32_t magic_mask = UINT32_C(126) << 23;
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const float magic_bias = 0.5f;
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const float denormalized_value = fp32_from_bits((two_w >> 17) | magic_mask) - magic_bias;
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/*
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* - Choose either results of conversion of input as a normalized number, or as a denormalized number, depending on the
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* input exponent. The variable two_w contains input exponent in bits 27-31, therefore if its smaller than 2**27, the
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* input is either a denormal number, or zero.
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* - Combine the result of conversion of exponent and mantissa with the sign of the input number.
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*/
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const uint32_t denormalized_cutoff = UINT32_C(1) << 27;
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const uint32_t result = sign |
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(two_w < denormalized_cutoff ? fp32_to_bits(denormalized_value) : fp32_to_bits(normalized_value));
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return fp32_from_bits(result);
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}
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/*
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* Convert a 32-bit floating-point number in IEEE single-precision format to a 16-bit floating-point number in
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* IEEE half-precision format, in bit representation.
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*
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* @note The implementation relies on IEEE-like (no assumption about rounding mode and no operations on denormals)
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* floating-point operations and bitcasts between integer and floating-point variables.
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*/
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static inline uint16_t fp16_ieee_from_fp32_value(float f) {
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#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) || defined(__GNUC__) && !defined(__STRICT_ANSI__)
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const float scale_to_inf = 0x1.0p+112f;
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const float scale_to_zero = 0x1.0p-110f;
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#else
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const float scale_to_inf = fp32_from_bits(UINT32_C(0x77800000));
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const float scale_to_zero = fp32_from_bits(UINT32_C(0x08800000));
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#endif
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float base = (fabsf(f) * scale_to_inf) * scale_to_zero;
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const uint32_t w = fp32_to_bits(f);
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const uint32_t shl1_w = w + w;
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const uint32_t sign = w & UINT32_C(0x80000000);
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uint32_t bias = shl1_w & UINT32_C(0xFF000000);
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if (bias < UINT32_C(0x71000000)) {
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bias = UINT32_C(0x71000000);
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}
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base = fp32_from_bits((bias >> 1) + UINT32_C(0x07800000)) + base;
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const uint32_t bits = fp32_to_bits(base);
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const uint32_t exp_bits = (bits >> 13) & UINT32_C(0x00007C00);
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const uint32_t mantissa_bits = bits & UINT32_C(0x00000FFF);
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const uint32_t nonsign = exp_bits + mantissa_bits;
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return (sign >> 16) | (shl1_w > UINT32_C(0xFF000000) ? UINT16_C(0x7E00) : nonsign);
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}
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void mul_mat_vec_f16_0(
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const uint16_t * src0,
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const uint16_t * src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols8 = ncols & ~7;
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for (int i = 0; i < nrows; i++) {
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__m256 sum = _mm256_setzero_ps();
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const uint16_t * src0_row = src0 + i * ncols;
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for (int j = 0; j < ncols8; j += 8) {
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__m256 a = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j)));
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__m256 b = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j)));
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sum = _mm256_fmadd_ps(a, b, sum);
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}
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dst[i] = reduce_vector8_0(sum);
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for (int j = ncols8; j < ncols; j++) {
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dst[i] += fp16_ieee_to_fp32_value(src0_row[j]) * fp16_ieee_to_fp32_value(src1[j]);
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}
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}
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}
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void mul_mat_vec_f16_1(
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const uint16_t * src0,
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const uint16_t * src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols16 = ncols & ~15;
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for (int i = 0; i < nrows; i++) {
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__m256 sum0 = _mm256_setzero_ps();
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__m256 sum1 = _mm256_setzero_ps();
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const uint16_t * src0_row = src0 + i * ncols;
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for (int j = 0; j < ncols16; j += 16) {
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__m256 a0 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 0)));
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__m256 a1 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 8)));
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__m256 b0 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j)));
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__m256 b1 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j + 8)));
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sum0 = _mm256_fmadd_ps(a0, b0, sum0);
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sum1 = _mm256_fmadd_ps(a1, b1, sum1);
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}
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dst[i] = reduce_vector8_0(sum0) + reduce_vector8_0(sum1);
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for (int j = ncols16; j < ncols; j++) {
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dst[i] += fp16_ieee_to_fp32_value(src0_row[j]) * fp16_ieee_to_fp32_value(src1[j]);
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}
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}
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}
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void mul_mat_vec_f16_2(
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const uint16_t * src0,
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const uint16_t * src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols32 = ncols & ~31;
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for (int i = 0; i < nrows; i++) {
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__m256 sum0 = _mm256_setzero_ps();
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__m256 sum1 = _mm256_setzero_ps();
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__m256 sum2 = _mm256_setzero_ps();
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__m256 sum3 = _mm256_setzero_ps();
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const uint16_t * src0_row = src0 + i * ncols;
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for (int j = 0; j < ncols32; j += 32) {
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__m256 a0 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 0)));
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__m256 a1 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 8)));
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__m256 a2 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 16)));
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__m256 a3 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 24)));
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__m256 b0 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j)));
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__m256 b1 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j + 8)));
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__m256 b2 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j + 16)));
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__m256 b3 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src1 + j + 24)));
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sum0 = _mm256_fmadd_ps(a0, b0, sum0);
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sum1 = _mm256_fmadd_ps(a1, b1, sum1);
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sum2 = _mm256_fmadd_ps(a2, b2, sum2);
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sum3 = _mm256_fmadd_ps(a3, b3, sum3);
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}
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dst[i] = reduce_vector8_0(sum0) + reduce_vector8_0(sum1) + reduce_vector8_0(sum2) + reduce_vector8_0(sum3);
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for (int j = ncols32; j < ncols; j++) {
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dst[i] += fp16_ieee_to_fp32_value(src0_row[j]) * fp16_ieee_to_fp32_value(src1[j]);
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}
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}
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}
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void mul_mat_vec_f16_3(
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const uint16_t * src0,
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const float * src1,
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float * dst,
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int nrows,
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int ncols) {
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const int ncols32 = ncols & ~31;
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for (int i = 0; i < nrows; i++) {
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__m256 sum0 = _mm256_setzero_ps();
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__m256 sum1 = _mm256_setzero_ps();
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__m256 sum2 = _mm256_setzero_ps();
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__m256 sum3 = _mm256_setzero_ps();
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const uint16_t * src0_row = src0 + i * ncols;
|
|
for (int j = 0; j < ncols32; j += 32) {
|
|
__m256 a0 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 0)));
|
|
__m256 a1 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 8)));
|
|
__m256 a2 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 16)));
|
|
__m256 a3 = _mm256_cvtph_ps(_mm_loadu_si128((__m128i*)(src0_row + j + 24)));
|
|
__m256 b0 = _mm256_loadu_ps(src1 + j);
|
|
__m256 b1 = _mm256_loadu_ps(src1 + j + 8);
|
|
__m256 b2 = _mm256_loadu_ps(src1 + j + 16);
|
|
__m256 b3 = _mm256_loadu_ps(src1 + j + 24);
|
|
sum0 = _mm256_fmadd_ps(a0, b0, sum0);
|
|
sum1 = _mm256_fmadd_ps(a1, b1, sum1);
|
|
sum2 = _mm256_fmadd_ps(a2, b2, sum2);
|
|
sum3 = _mm256_fmadd_ps(a3, b3, sum3);
|
|
}
|
|
dst[i] = reduce_vector8_0(sum0) + reduce_vector8_0(sum1) + reduce_vector8_0(sum2) + reduce_vector8_0(sum3);
|
|
|
|
for (int j = ncols32; j < ncols; j++) {
|
|
dst[i] += fp16_ieee_to_fp32_value(src0_row[j]) * fp16_ieee_to_fp32_value(src1[j]);
|
|
}
|
|
}
|
|
}
|
|
|
|
uint64_t get_time_us() {
|
|
struct timeval tv;
|
|
gettimeofday(&tv, NULL);
|
|
return tv.tv_sec * 1000000 + tv.tv_usec;
|
|
}
|
|
|
|
int main(int argc, const char ** argv) {
|
|
float * src0 = (float *)malloc(sizeof(float)*N*M);
|
|
float * src1 = (float *)malloc(sizeof(float)*M);
|
|
float * dst = (float *)malloc(sizeof(float)*N);
|
|
|
|
//float * src0 = (float *)(aligned_alloc(64, sizeof(float)*N*M));
|
|
//float * src1 = (float *)(aligned_alloc(64, sizeof(float)*M));
|
|
//float * dst = (float *)(aligned_alloc(64, sizeof(float)*N));
|
|
|
|
for (int i = 0; i < N*M; i++) {
|
|
src0[i] = rand() / (float)RAND_MAX;
|
|
}
|
|
|
|
for (int i = 0; i < M; i++) {
|
|
src1[i] = rand() / (float)RAND_MAX;
|
|
}
|
|
|
|
// convert src0 and src1 to __fp16
|
|
uint16_t * src0_fp16 = (uint16_t *)(malloc(sizeof(uint16_t)*N*M));
|
|
uint16_t * src1_fp16 = (uint16_t *)(malloc(sizeof(uint16_t)*M));
|
|
//uint16_t * src0_fp16 = (uint16_t *)(aligned_alloc(64, sizeof(uint16_t)*N*M));
|
|
//uint16_t * src1_fp16 = (uint16_t *)(aligned_alloc(64, sizeof(uint16_t)*M));
|
|
|
|
{
|
|
const uint64_t t_start = get_time_us();
|
|
|
|
for (int i = 0; i < N*M; i++) {
|
|
src0_fp16[i] = fp16_ieee_from_fp32_value(src0[i]);
|
|
//printf("%f %f\n", src0[i], fp16_ieee_to_fp32_value(src0_fp16[i]));
|
|
//assert(!isnan(fp16_ieee_to_fp32_value(src0_fp16[i])));
|
|
}
|
|
|
|
for (int i = 0; i < M; i++) {
|
|
src1_fp16[i] = fp16_ieee_from_fp32_value(src1[i]);
|
|
}
|
|
|
|
const uint64_t t_end = get_time_us();
|
|
printf("convert time: %f ms\n", (t_end - t_start) / 1000.0);
|
|
}
|
|
|
|
for (int i = 0; i < 16; ++i) {
|
|
printf("%f %f\n", src0[i], fp16_ieee_to_fp32_value(src0_fp16[i]));
|
|
}
|
|
|
|
int method = 0;
|
|
if (argc > 1) {
|
|
method = atoi(argv[1]);
|
|
}
|
|
|
|
const int nIter = 1000;
|
|
|
|
const clock_t start = clock();
|
|
const uint64_t start_us = get_time_us();
|
|
|
|
double iM = 1.0/M;
|
|
double sum = 0.0f;
|
|
for (int i = 0; i < nIter; i++) {
|
|
if (method == 0) {
|
|
mul_mat_vec_f32_0(src0, src1, dst, N, M);
|
|
}
|
|
|
|
if (method == 1) {
|
|
mul_mat_vec_f32_1(src0, src1, dst, N, M);
|
|
}
|
|
|
|
if (method == 2) {
|
|
mul_mat_vec_f32_2(src0, src1, dst, N, M);
|
|
}
|
|
|
|
if (method == 3) {
|
|
mul_mat_vec_f16_0(src0_fp16, src1_fp16, dst, N, M);
|
|
}
|
|
|
|
if (method == 4) {
|
|
mul_mat_vec_f16_1(src0_fp16, src1_fp16, dst, N, M);
|
|
}
|
|
|
|
if (method == 5) {
|
|
mul_mat_vec_f16_2(src0_fp16, src1_fp16, dst, N, M);
|
|
}
|
|
|
|
if (method == 6) {
|
|
mul_mat_vec_f16_3(src0_fp16, src1, dst, N, M);
|
|
}
|
|
}
|
|
|
|
for (int i = 0; i < N; i++) {
|
|
sum += dst[i]*iM;
|
|
}
|
|
|
|
{
|
|
const clock_t end = clock();
|
|
const uint64_t end_us = get_time_us();
|
|
printf("%s: elapsed ticks: %ld\n", __func__, end - start);
|
|
printf("%s: elapsed us: %ld\n", __func__, end_us - start_us);
|
|
}
|
|
|
|
printf("%f\n", sum);
|
|
|
|
free(src0);
|
|
free(src1);
|
|
free(dst);
|
|
|
|
free(src0_fp16);
|
|
free(src1_fp16);
|
|
|
|
return 0;
|
|
}
|